Bootloader and Flashloader App

.cargo/def-config.toml

@@ -35,6 +35,8 @@ target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
 [alias]
 rb = "run --bin"
 rrb = "run --release --bin"
+ut = "test --target=x86_64-unknown-linux-gnu"
+genbin = "objcopy --release -- -O binary app.bin"
 
 [env]
 DEFMT_LOG = "info"

.gitignore

@@ -14,3 +14,4 @@ Cargo.lock
 **/*.rs.bk
 
 /app.map
+/app.bin

Cargo.toml

@@ -1,11 +1,17 @@
 [workspace]
 resolver = "2"
 members = [
+  "bootloader",
+  "flashloader",
   "examples/simple",
 	"va416xx",
 	"va416xx-hal",
 	"vorago-peb1"
 ]
+exclude = [
+  "flashloader/slot-a-blinky",
+  "flashloader/slot-b-blinky",
+]
 
 [profile.dev]
 codegen-units = 1
@@ -25,3 +31,12 @@ incremental = false
 lto = 'fat'
 opt-level = 3            # <-
 overflow-checks = false  # <-
+
+[profile.small]
+inherits = "release"
+codegen-units = 1
+debug-assertions = false # <-
+lto = true
+opt-level = 'z'            # <-
+overflow-checks = false  # <-
+# strip = true  # Automatically strip symbols from the binary.

README.md

@@ -19,7 +19,12 @@ This workspace contains the following crates:
 
 It also contains the following helper crates:
 
-- The `examples` crates contains various example applications for the HAL and the PAC.
+- The [`bootloader`](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/bootloader)
+  crate contains a sample bootloader strongly based on the one provided by Vorago.
+- The [`flashloader`](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader)
+  crate contains a sample flashloader which is able to update the redundant images in the NVM which
+  is compatible to the provided bootloader as well.
+- The `examples` folder contains various example applications crates for the HAL and the PAC.
 
 ## Using the `.cargo/config.toml` file
 

bootloader/Cargo.toml

@@ -0,0 +1,15 @@
+[package]
+name = "bootloader"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
+cortex-m = "0.7"
+cortex-m-rt = "0.7"
+embedded-hal = "1"
+panic-rtt-target = { version = "0.1.3" }
+rtt-target = { version = "0.5" }
+crc = "3"
+
+[dependencies.va416xx-hal]
+path = "../va416xx-hal"

bootloader/README.md

@@ -0,0 +1,47 @@
+VA416xx Bootloader Application
+=======
+
+This is the Rust version of the bootloader supplied by Vorago.
+
+## Memory Map
+
+The bootloader uses the following memory map:
+
+| Address | Notes | Size |
+| ------ | ---- |  ---- |
+| 0x0 | Bootloader start | code up to 0x3FFC bytes |
+| 0x3FFC | Bootloader CRC | word |
+| 0x4000 | App image A start | code up to 0x1DFFC (~120K) bytes |
+| 0x21FFC | App image A CRC check length | word |
+| 0x21FFE | App image A CRC check value | word |
+| 0x22000 | App image B start | code up to 0x1DFFC (~120K) bytes |
+| 0x3FFFC | App image B CRC check length | word |
+| 0x3FFFE | App image B CRC check value | word |
+| 0x40000 | End of NVM | end  |
+
+## Additional Information
+
+As opposed to the Vorago example code, this bootloader assumes a 40 MHz external clock
+but does not scale that clock up. It also uses a word (4 bytes) instead of a half-word for the CRC
+and uses the ISO 3309 CRC32 standard checksum.
+
+This bootloader does not provide tools to flash the NVM memories by itself. Instead, you can use
+the [flashloader](https://egit.irs.uni-stuttgart.de/rust/va416xx-rs/src/branch/main/flashloader)
+application to perform this task using a CCSDS interface via a UART.
+
+The bootloader performs the following steps:
+
+1. The application will calculate the checksum of itself if the bootloader CRC is blank (all zeroes
+   or all ones). If the CRC is not blank and the checksum check fails, it will immediately boot
+   application image A. Otherwise, it proceeds to the next step.
+2. Check the checksum of App A. If that checksum is valid, it will boot App A. If not, it will
+   proceed to the next step.
+3. Check the checksum of App B. If that checksum is valid, it will boot App B. If not, it will
+   boot App A as the fallback image.
+
+You could adapt and combine this bootloader with a non-volatile memory to select a prefered app
+image, which would be a first step towards an updatable flight software.
+
+Please note that you *MUST* compile the application at slot A and slot B with an appropriate
+`memory.x` file where the base address of the `FLASH` was adapted according to the base address
+shown in the memory map above. The memory files to do this were provided in the `scripts` folder.