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Merge pull request riscv-non-isa#283 from ved-rivos/fault_ats
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Fix missing fault logging in reference model for ATS Translation request with UR/CA resp…
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@ved-rivos
ved-rivos authored Mar 8, 2024
2 parents 35aa849 + 9cebaf3 commit 70ed06b
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Showing 2 changed files with 25 additions and 16 deletions.
15 changes: 12 additions & 3 deletions iommu_ref_model/libiommu/src/iommu_translate.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -503,7 +503,8 @@ iommu_translate_iova(
goto stop_and_report_fault;

stop_and_report_fault:
// No faults are logged in the fault queue for PCIe ATS Translation Requests.
// No faults are logged in the fault queue for PCIe ATS Translation Requests
// with success response.
if ( req->tr.at != ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST ) {
report_fault(cause, iotval, iotval2, TTYP, DTF,
req->device_id, req->pid_valid, req->process_id, req->priv_req);
Expand All @@ -521,8 +522,11 @@ iommu_translate_iova(
// * PDT entry load access fault (cause = 265)
// * PDT entry misconfigured (cause = 267)
if ( (cause == 1) || (cause == 5) || (cause == 7) || (cause == 261) ||
(cause == 263) || (cause == 265) || (cause == 267) )
(cause == 263) || (cause == 265) || (cause == 267) ) {
report_fault(cause, iotval, iotval2, TTYP, DTF,
req->device_id, req->pid_valid, req->process_id, req->priv_req);
goto return_completer_abort;
}

// If there is a permanent error or if ATS transactions are disabled then a
// Unsupported Request (UR) response is generated. The following cause codes
Expand All @@ -532,12 +536,17 @@ iommu_translate_iova(
// * DDT entry not valid (cause = 258)
// * DDT entry misconfigured (cause = 259)
// * Transaction type disallowed (cause = 260)
if ( (cause == 256) || (cause == 257) || (cause == 258) || (cause == 259) || (cause == 260) )
if ( (cause == 256) || (cause == 257) || (cause == 258) || (cause == 259) ||
(cause == 260) ) {
report_fault(cause, iotval, iotval2, TTYP, DTF,
req->device_id, req->pid_valid, req->process_id, req->priv_req);
goto return_unsupported_request;
}

// When translation could not be completed due to PDT entry being not present, MSI
// PTE being not present, or first and/or second stage PTE being not present or
// misconfigured then a Success Response with R and W bits set to 0 is generated.
// No faults are logged in the fault queue on these errors.
// The translated address returned with such completions is undefined. The
// following cause codes belong to this category:
// * Instruction page fault (cause = 12)
Expand Down
26 changes: 13 additions & 13 deletions iommu_ref_model/test/test_app.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -105,7 +105,7 @@ main(void) {
if ( at == ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST ) {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, READ, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 256, 0) < 0 ) );
} else {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, (no_write ^ 1), &req, &rsp);
Expand All @@ -121,7 +121,7 @@ main(void) {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, READ, &req, &rsp);
if ( at == ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST ) {
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 260, 0) < 0 ) );
}
if ( at == ADDR_TYPE_TRANSLATED ) {
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 260, 0) < 0 ) );
Expand All @@ -138,11 +138,11 @@ main(void) {
fail_if( ( enable_iommu(DDT_1LVL) < 0 ) );
send_translation_request(0x000145, 0, 0x99, 0, 0, 0, 0,
UNTRANSLATED_REQUEST, 0, 1, READ, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 260, 0) < 0 ) );
fail_if( ( enable_iommu(DDT_2LVL) < 0 ) );
send_translation_request(0x012345, 0, 0x99, 0, 0, 0, 0,
UNTRANSLATED_REQUEST, 0, 1, READ, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 260, 0) < 0 ) );

END_TEST();

Expand All @@ -158,7 +158,7 @@ main(void) {
if ( at == ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST ) {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, READ, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 258, 0) < 0 ) );
} else {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, (no_write ^ 1), &req, &rsp);
Expand Down Expand Up @@ -195,7 +195,7 @@ main(void) {
if ( at == ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST ) {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, READ, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 259, 0) < 0 ) );
} else {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, (no_write ^1), &req, &rsp);
Expand Down Expand Up @@ -402,7 +402,7 @@ main(void) {
if ( at == ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST ) {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, READ, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 258, 0) < 0 ) );
} else {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, (no_write ^ 1), &req, &rsp);
Expand Down Expand Up @@ -833,7 +833,7 @@ main(void) {
if ( at == ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST ) {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, READ, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 260, 0) < 0 ) );
} else if ( at == ADDR_TYPE_TRANSLATED ) {
send_translation_request(0x012345, pid_valid, 0x99, no_write, exec_req,
priv_req, 0, at, 0xdeadbeef, 16, (no_write ^1), &req, &rsp);
Expand Down Expand Up @@ -2374,7 +2374,7 @@ main(void) {
send_translation_request(0x112233, 1, 0xBABEC, 0,
0, 1, 0, ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST, gva,
1, READ, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 260, 0) < 0 ) );

// Disable supv to user access
PC.ta.ENS = 1;
Expand All @@ -2395,7 +2395,7 @@ main(void) {
send_translation_request(0x112233, 1, 0xBABEC, 0,
0, 1, 0, ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST, gva,
1, WRITE, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, COMPLETER_ABORT, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, COMPLETER_ABORT, 265, 0) < 0 ) );
access_viol_addr = -1;
iodir(INVAL_PDT, 1, 0x112233, 0xBABEC);

Expand All @@ -2406,21 +2406,21 @@ main(void) {
send_translation_request(0x112233, 1, 0xBABEC, 0,
0, 1, 0, ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST, gva,
1, WRITE, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 260, 0) < 0 ) );
DC.fsc.pdtp.MODE = PD17;
write_memory((char *)&DC, DC_addr, 64);
iodir(INVAL_DDT, 1, 0x112233, 0);
send_translation_request(0x112233, 1, 0xBABEC, 0,
0, 1, 0, ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST, gva,
1, WRITE, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 260, 0) < 0 ) );
DC.fsc.pdtp.MODE = 9;
write_memory((char *)&DC, DC_addr, 64);
iodir(INVAL_DDT, 1, 0x112233, 0);
send_translation_request(0x112233, 1, 0xBABEC, 0,
0, 1, 0, ADDR_TYPE_PCIE_ATS_TRANSLATION_REQUEST, gva,
1, WRITE, &req, &rsp);
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 0, 0) < 0 ) );
fail_if( ( check_rsp_and_faults(&req, &rsp, UNSUPPORTED_REQUEST, 259, 0) < 0 ) );
DC.fsc.pdtp.MODE = PD20;
write_memory((char *)&DC, DC_addr, 64);
iodir(INVAL_DDT, 1, 0x112233, 0);
Expand Down

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