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Merge pull request riscv-non-isa#298 from ved-rivos/0423_1
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revert bad commit
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ved-rivos authored Apr 23, 2024
2 parents a332eaf + 24c3293 commit bef73e2
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4 changes: 0 additions & 4 deletions iommu.bib
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Expand Up @@ -17,7 +17,3 @@ @electronic{AIA
title = {RISC-V Advanced Interrupt Architecture},
url = {https://github.com/riscv/riscv-aia}
}
@electronic{CFI,
title = {RISC-V Shadow Stacks and Landing Pads},
url = {https://github.com/riscv/riscv-cfi}
}
4 changes: 1 addition & 3 deletions iommu_data_structures.adoc
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Expand Up @@ -991,9 +991,7 @@ The process to translate an `IOVA` is as follows:
. Translation process is complete
When checking the `U` bit in a second-stage PTE, the transaction is treated as
not requesting supervisor privilege. The `pte.xwr=010` encoding, as specified by
the Zicfiss cite:[CFI] extension for the Shadow Stack page type in single-stage
and VS-stage page tables, remains a reserved encoding for IO transactions.
not requesting supervisor privilege.
When the translation process reports a fault, and the request is an Untranslated
request or a Translated request, the IOMMU requests the IO bridge to abort the
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