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Added support for NXP MCX W71 #551

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17 changes: 11 additions & 6 deletions .github/workflows/test-configs.yml
Original file line number Diff line number Diff line change
Expand Up @@ -159,12 +159,17 @@ jobs:
arch: ppc
config-file: ./config/examples/nxp-t2080.config

# MCXA test disabled until MCXA is available in mcux
# nxp_mcxa_test:
# uses: ./.github/workflows/test-build-mcux-sdk.yml
# with:
# arch: arm
# config-file: ./config/examples/mcxa.config
nxp_mcxa_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/mcxa.config

nxp_mcxw_test:
uses: ./.github/workflows/test-build-mcux-sdk.yml
with:
arch: arm
config-file: ./config/examples/mcxw.config

raspi3_test:
uses: ./.github/workflows/test-build.yml
Expand Down
42 changes: 35 additions & 7 deletions arch.mk
Original file line number Diff line number Diff line change
Expand Up @@ -613,29 +613,57 @@ ifeq ($(TARGET),mcxa)
CFLAGS+=\
-I$(MCUXPRESSO_DRIVERS) \
-I$(MCUXPRESSO_DRIVERS)/drivers \
-I$(MCUXPRESSO_DRIVERS)/drivers/common \
-I$(MCUXPRESSO)/drivers \
-I$(MCUXPRESSO)/drivers/common \
-I$(MCUXPRESSO_CMSIS)/Include \
-I$(MCUXPRESSO_CMSIS)/Core/Include
-I$(MCUXPRESSO_CMSIS)/Core/Include \
-I$(MCUXPRESSO)/drivers/flash \
-I$(MCUXPRESSO)/drivers/mcx_spc \
-I$(MCUXPRESSO)/drivers/sysmpu \
-I$(MCUXPRESSO)/drivers/ltc \
-I$(MCUXPRESSO)/drivers/port \
-I$(MCUXPRESSO)/drivers/gpio
CFLAGS+=-DCPU_$(MCUXPRESSO_CPU) -DDEBUG_CONSOLE_ASSERT_DISABLE=1
CFLAGS+=-DWOLFSSL_SP_NO_UMAAL
CFLAGS+=-Wno-old-style-declaration
CFLAGS+=-mcpu=cortex-m33 -DCORTEX_M33 -U__ARM_FEATURE_DSP
LDFLAGS+=-mcpu=cortex-m33
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_spc.o
$(MCUXPRESSO)/drivers/mcx_spc/fsl_spc.o \
$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o
endif

ifeq ($(MCUXSDK),1)
CFLAGS+=\
ifeq ($(TARGET),mcxw)
CORTEX_M33=1
CFLAGS+=\
-I$(MCUXPRESSO_DRIVERS) \
-I$(MCUXPRESSO_DRIVERS)/drivers \
-I$(MCUXPRESSO_DRIVERS)/periph2 \
-I$(MCUXPRESSO)/drivers \
-I$(MCUXPRESSO)/drivers/flash_k4 \
-I$(MCUXPRESSO)/drivers/ccm32k \
-I$(MCUXPRESSO)/drivers/common \
-I$(MCUXPRESSO_CMSIS)/Include \
-I$(MCUXPRESSO_CMSIS)/Core/Include \
-I$(MCUXPRESSO)/drivers/flash \
-I$(MCUXPRESSO)/drivers/spc \
-I$(MCUXPRESSO)/drivers/sysmpu \
-I$(MCUXPRESSO)/drivers/ltc \
-I$(MCUXPRESSO)/drivers/port \
-I$(MCUXPRESSO)/drivers/gpio

else
endif
CFLAGS+=-DCPU_$(MCUXPRESSO_CPU) -DDEBUG_CONSOLE_ASSERT_DISABLE=1
CFLAGS+=-DWOLFSSL_SP_NO_UMAAL
CFLAGS+=-Wno-old-style-declaration
CFLAGS+=-mcpu=cortex-m33 -DCORTEX_M33 -U__ARM_FEATURE_DSP
LDFLAGS+=-mcpu=cortex-m33
OBJS+=\
$(MCUXPRESSO_DRIVERS)/drivers/fsl_clock.o \
$(MCUXPRESSO)/drivers/spc/fsl_spc.o \
$(MCUXPRESSO_DRIVERS)/project_template/clock_config.o \
$(MCUXPRESSO)/drivers/ccm32k/fsl_ccm32k.o \
$(MCUXPRESSO_DRIVERS)/drivers/fsl_romapi.o
endif

ifeq ($(TARGET),imx_rt)
Expand Down
6 changes: 3 additions & 3 deletions config/examples/mcxa.config
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@ ARCH?=ARM
TARGET?=mcxa
SIGN?=ECC256
HASH?=SHA256
MCUXSDK?=0
MCUXPRESSO?=$(PWD)/../NXP/MCXA153
MCUXPRESSO_CMSIS?=$(MCUXPRESSO)/CMSIS
MCUXSDK?=1
MCUXPRESSO?=$(PWD)/../NXP/mcux-sdk
MCUXPRESSO_CMSIS?=$(PWD)/../NXP/CMSIS_5/CMSIS
MCUXPRESSO_CPU?=MCXA153VLH
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MCXA153
DEBUG?=0
Expand Down
42 changes: 42 additions & 0 deletions config/examples/mcxw.config
Original file line number Diff line number Diff line change
@@ -0,0 +1,42 @@
ARCH?=ARM
TARGET?=mcxw
SIGN?=ECC256
HASH?=SHA256
MCUXSDK?=1
MCUXPRESSO?=$(PWD)/../NXP/mcux-sdk
MCUXPRESSO_CMSIS?=$(PWD)/../NXP/CMSIS_5/CMSIS
MCUXPRESSO_CPU?=MCXW716CMFTA
MCUXPRESSO_DRIVERS?=$(MCUXPRESSO)/devices/MCXW716C
DEBUG?=0
VTOR?=1
CORTEX_M0?=0
NO_ASM?=0
NO_MPU=1
EXT_FLASH?=0
SPI_FLASH?=0
ALLOW_DOWNGRADE?=0
NVM_FLASH_WRITEONCE?=1
NO_ARM_ASM=1
WOLFBOOT_VERSION?=0
V?=0
SPMATH?=1
RAM_CODE?=1
DUALBANK_SWAP?=0
PKA?=1

# 8KB sectors
WOLFBOOT_SECTOR_SIZE?=0x2000

# Default configuration
# 32KB boot, 44KB partitions, 8KB swap
WOLFBOOT_PARTITION_SIZE?=0xB000
WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x8000
WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x13000
WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x1E000

# Alternate larger configuration for debugging or ARMASM
# 40KB boot, 40KB partitions, 8KB swap
#WOLFBOOT_PARTITION_SIZE?=0xA000
#WOLFBOOT_PARTITION_BOOT_ADDRESS?=0xA000
#WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x14000
#WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x1E000
80 changes: 80 additions & 0 deletions docs/Targets.md
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@ This README describes configuration of supported targets.
* [NXP LPC54xxx](#nxp-lpc54xxx)
* [NXP LS1028A](#nxp-ls1028a)
* [NXP MCXA153](#nxp-mcxa153)
* [NXP MCXW716C](#nxp-mcxw716c)
* [NXP P1021 PPC](#nxp-qoriq-p1021-ppc)
* [NXP T1024 PPC](#nxp-qoriq-t1024-ppc)
* [NXP T2080 PPC](#nxp-qoriq-t2080-ppc)
Expand Down Expand Up @@ -2241,6 +2242,85 @@ mon reset
c
```

## NXP MCXW716

NXP MCXW716 is a Cortex-M33 microcontroller running at 96MHz.
The support has been tested using FRDM-MCXW716 with the onboard MCU-Link configured in JLink mode.

This requires the MCXW SDK from the NXP MCUXpresso SDK Builder. We tested using [mcux-sdk](https://github.com/nxp-mcuxpresso/mcux-sdk) and [CMSIS_5](https://github.com/nxp-mcuxpresso/CMSIS_5)`
placed under "../NXP". Adjust the MCUXPRESSO and MCUXPRESSO_CMSIS variables in your .config file according to your paths.

### MCX W: Configuring and compiling

Copy the example configuration file and build with make:

```sh
cp config/examples/mcxw.config .config`
make
```

### MCX W: Loading the firmware

The NXP Freedom MCX W board debugger comes loaded with MCU Link, but it can be updated to JLink. See https://docs.nxp.com/bundle/UM12012/page/topics/Updating_MCU_Link_firmware.html

Use JLinkExe tool to upload the initial firmware: `JLinkExe -if swd -Device MCXW716`

At the Jlink prompt, type:

```
loadbin factory.bin 0
Downloading file [factory.bin]...
J-Link: Flash download: Bank 0 @ 0x00000000: Skipped. Contents already match
O.K.
```

Reset or power cycle board.

Once wolfBoot has performed validation of the partition and booted the D15 Green LED on P3_13 will illuminate.

### MCX W: Testing firmware update

1) Sign the test-app with version 2:

```sh
./tools/keytools/sign --ecc256 test-app/image.bin wolfboot_signing_private_key.der 2
```

2) Create a bin footer with wolfBoot trailer "BOOT" and "p" (ASCII for 0x70 == IMG_STATE_UPDATING):

```sh
echo -n "pBOOT" > trigger_magic.bin
```

3) Assembly new factory update.bin:

```sh
./tools/bin-assemble/bin-assemble \
update.bin \
0x0 test-app/image_v2_signed.bin \
0xAFFB trigger_magic.bin
```

4) Flash update.bin to 0x13000 (`loadbin update.bin 0x13000`). The D15 RGB LED Blue P3_0 will show if version is > 1.

Note: For alternate larger scheme flash `update.bin` to `0x14000` and place trigger_magic.bin at `0x9FFB`.

### MCX W: Debugging

Debugging with JLink:

Note: We include a `.gdbinit` in the wolfBoot root that loads the wolfboot and test-app elf files.

In one terminal: `JLinkGDBServer -if swd -Device MCXW716 -port 3333`

In another terminal use `gdb`:

```
b main
mon reset
c
```


## TI Hercules TMS570LC435

Expand Down
55 changes: 4 additions & 51 deletions hal/mcxa.c
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,10 @@
static flash_config_t pflash;
static int flash_init = 0;

uint32_t SystemCoreClock;

extern void BOARD_BootClockFRO96M(void);

#ifdef __WOLFBOOT
/* Assert hook needed by Kinetis SDK */
void __assert_func(const char *a, int b, const char *c, const char *d)
Expand All @@ -46,57 +50,6 @@ void __assert_func(const char *a, int b, const char *c, const char *d)
;
}

/* The following clock setting function is autogenerated by the MCUXpresso IDE */
void BOARD_BootClockFRO96M(void)
{
uint32_t coreFreq;
spc_active_mode_core_ldo_option_t ldoOption;
spc_sram_voltage_config_t sramOption;

/* Get the CPU Core frequency */
coreFreq = CLOCK_GetCoreSysClkFreq();

/* The flow of increasing voltage and frequency */
if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
}

CLOCK_SetupFROHFClocking(96000000U); /*!< Enable FRO HF(96MHz) output */

CLOCK_SetupFRO12MClocking(); /*!< Setup FRO12M clock */

CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK); /* !< Switch MAIN_CLK to FRO_HF */

/* The flow of decreasing voltage and frequency */
if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
/* Configure Flash to support different voltage level and frequency */
FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
/* Specifies the operating voltage for the SRAM's read/write timing margin */
sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
sramOption.requestVoltageUpdate = true;
(void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
/* Set the LDO_CORE VDD regulator level */
ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
(void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
}

/*!< Set up clock selectors - Attach clocks to the peripheries */

/*!< Set up dividers */
CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U); /* !< Set AHBCLKDIV divider to value 1 */
CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U); /* !< Set FROHFDIV divider to value 1 */
}

void hal_init(void)
{
/* Clock setting */
Expand Down
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