uj

yonseicasl · Apr 26, 2020 · a72f7fd · a72f7fd
1 parent c9b0484
commit a72f7fd
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Showing 2 changed files with 4 additions and 3 deletions.
diff --git a/UPDATE b/UPDATE
@@ -103,6 +103,8 @@ Update history:
       registers, ALU, and data memory are empty.
 
 * Version 1.7 (April 26, 2020)
+    - A bug is fixed in inst_memory.cc when parsing UJ-type instruction
+      (i.e., jal).
     - A redundant condition in proc_t::fetch() is removed. It checked if inst
       was valid before get_op_type(inst->op) == op_sb_type for conditional
       branches. It was unnecessary since the this line of code was never

diff --git a/inst_memory.cc b/inst_memory.cc
@@ -217,14 +217,13 @@ void inst_memory_t::parse_inst_str(std::string m_inst_str, size_t m_line_num) {
                      << " at line #" << m_line_num << endl;
                 exit(1);
             }
-            if(!is_reg_str(args[1]) || !is_num_str(args[2])) {
+            if(!is_reg_str(args[1])) {
                 cerr << "Error: invalid instruction format: " << m_inst_str
                      << " at line #" << m_line_num << endl;
                 exit(1);
             }
             inst.rd_num  = get_regnum(args[1]);
-            inst.imm     = get_imm(args[2]);
-            inst.label   = args[3];
+            inst.label   = args[2];
             break;
         }
         default: { break; } // Nothing to do