KW45 SoC, and KW45B41-EVK board support

boards/nxp/kw45b41z_evk/Kconfig

@@ -0,0 +1,8 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_INIT_PRIORITY
+	int "Board initialization priority"
+	default 45
+	help
+	  Board initialization priority.

boards/nxp/kw45b41z_evk/Kconfig.defconfig

@@ -0,0 +1,11 @@
+# KW45B41Z-EVK board
+
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_KW45B41Z_EVK
+
+config BT_DIS_MANUF
+	default "NXP"
+
+endif # BOARD_KW45B41Z_EVK

boards/nxp/kw45b41z_evk/Kconfig.kw45b41z_evk

@@ -0,0 +1,6 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_KW45B41Z_EVK
+	select SOC_KW45B41Z83
+	select SOC_PART_NUMBER_KW45B41Z83AFTA

boards/nxp/kw45b41z_evk/board.cmake

@@ -0,0 +1,6 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=kw45b41z83" "--reset-after-load")
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/nxp/kw45b41z_evk/board.yml

@@ -0,0 +1,8 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+board:
+  name: kw45b41z_evk
+  vendor: nxp
+  socs:
+    - name: kw45b41z83

boards/nxp/kw45b41z_evk/kw45b41z_evk-pinctrl.dtsi

@@ -0,0 +1,62 @@
+/*
+ * Copyright 2025 NXP
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <nxp/mcx/MCXW716CMFTA-pinctrl.h>
+
+&pinctrl {
+	pinmux_lpuart0: pinmux_lpuart0 {
+		group0 {
+			pinmux = <LPUART0_RX_PTA16>, <LPUART0_TX_PTA17>;
+			drive-strength = "low";
+			slew-rate = "fast";
+		};
+	};
+
+	pinmux_lpuart1: pinmux_lpuart1 {
+		group0 {
+			pinmux = <LPUART1_RX_PTC2>, <LPUART1_TX_PTC3>;
+			drive-strength = "low";
+			slew-rate = "fast";
+		};
+	};
+
+	pinmux_tpm0: pinmux_tpm0 {
+		group0 {
+			pinmux = <TPM0_CH0_PTA21>,
+				<TPM0_CH1_PTA20>,
+				<TPM0_CH2_PTA19>;
+			drive-strength = "low";
+			slew-rate = "fast";
+		};
+	};
+
+	pinmux_lpi2c1: pinmux_lpi2c1 {
+		group0 {
+			pinmux = <LPI2C1_SCL_PTC0>,
+				<LPI2C1_SDA_PTC1>;
+			drive-strength = "low";
+			slew-rate = "fast";
+			bias-pull-up;
+		};
+	};
+
+	pinmux_lpspi1: pinmux_lpspi1 {
+		group0 {
+			pinmux = <LPSPI1_SIN_PTB1>,
+				 <LPSPI1_SOUT_PTB3>;
+			slew-rate = "fast";
+			drive-strength = "low";
+		};
+	};
+
+	pinmux_flexcan: pinmux_flexcan {
+		group0 {
+			pinmux = <CAN0_RX_PTC5>, <CAN0_TX_PTC4>;
+			slew-rate = "slow";
+			drive-strength = "low";
+		};
+	};
+
+};

boards/nxp/kw45b41z_evk/kw45b41z_evk.dts

@@ -0,0 +1,150 @@
+/*
+ * Copyright 2025 NXP
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <nxp/nxp_mcxw71.dtsi>
+#include "kw45b41z_evk-pinctrl.dtsi"
+
+/ {
+	model = "NXP KW45B41Z83-EVK board";
+	compatible = "nxp,kw45";
+
+	aliases {
+		led0 = &blue_led;
+		blue-pwm-led = &blue_pwm_led;
+		green-pwm-led = &green_pwm_led;
+		red-pwm-led = &red_pwm_led;
+	};
+
+	chosen {
+		zephyr,flash = &flash;
+		zephyr,flash-controller = &fmu;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,sram = &stcm0;
+		zephyr,console = &lpuart1;
+		zephyr,shell-uart = &lpuart1;
+		zephyr,uart-pipe = &lpuart0;
+		zephyr,canbus = &flexcan0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		blue_led: led {
+			gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
+		blue_pwm_led: pwm_led_0 {
+			pwms = <&tpm0 1 PWM_USEC(200) PWM_POLARITY_NORMAL>;
+		};
+		green_pwm_led: pwm_led_1 {
+			pwms = <&tpm0 2 PWM_USEC(200) PWM_POLARITY_NORMAL>;
+		};
+		red_pwm_led: pwm_led_2 {
+			pwms = <&tpm0 0 PWM_USEC(200) PWM_POLARITY_NORMAL>;
+		};
+	};
+};
+
+&vref {
+	status = "okay";
+};
+
+&gpiob {
+	status = "okay";
+};
+
+&lpuart0 {
+	current-speed = <115200>;
+	status =  "okay";
+	pinctrl-0 = <&pinmux_lpuart0>;
+	pinctrl-names = "default";
+};
+
+&lpuart1 {
+	current-speed = <115200>;
+	status =  "okay";
+	pinctrl-0 = <&pinmux_lpuart1>;
+	pinctrl-names = "default";
+};
+
+&lpi2c1 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_lpi2c1>;
+	pinctrl-names = "default";
+};
+
+&lpspi1 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_lpspi1>;
+	pinctrl-names = "default";
+};
+
+&flexcan0 {
+	status = "okay";
+	bitrate = <125000>;
+	pinctrl-0 = <&pinmux_flexcan>;
+	pinctrl-names = "default";
+
+	can-transceiver {
+		max-bitrate = <420000000>;
+	};
+};
+
+&flash {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		boot_partition: partition@0 {
+			reg = <0x0 DT_SIZE_K(64)>;
+		};
+
+		slot0_partition: partition@10000 {
+			reg = <0x10000 DT_SIZE_K(416)>;
+		};
+
+		slot1_partition: partition@78000 {
+			reg = <0x78000 DT_SIZE_K(416)>;
+		};
+
+		storage_partition: partition@e0000 {
+			reg = <0xe0000 DT_SIZE_K(128)>;
+		};
+	};
+};
+
+&fmu {
+	status = "okay";
+};
+
+&tpm0 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_tpm0>;
+	pinctrl-names = "default";
+};
+
+&lptmr0 {
+	status = "okay";
+};
+
+&flexcan0 {
+	status = "okay";
+	pinctrl-0 = <&pinmux_flexcan>;
+	pinctrl-names = "default";
+
+	can-transceiver {
+		max-bitrate = <5000000>;
+	};
+};
+
+&nbu {
+	status = "okay";
+	wakeup-source;
+};

boards/nxp/kw45b41z_evk/kw45b41z_evk.yaml

@@ -0,0 +1,20 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: kw45b41z_evk
+name: NXP KW45B41Z-EVK
+type: mcu
+arch: arm
+ram: 64
+flash: 1024
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - can
+  - gpio
+  - spi
+  - watchdog
+  - i2c
+vendor: nxp

boards/nxp/kw45b41z_evk/kw45b41z_evk_defconfig

@@ -0,0 +1,10 @@
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_ARM_MPU=y
+CONFIG_TRUSTED_EXECUTION_SECURE=y
+CONFIG_PINCTRL=y
+CONFIG_SERIAL=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_GPIO=y

samples/bluetooth/beacon/sample.yaml

@@ -9,6 +9,7 @@ tests:
       - nrf51dk/nrf51822
       - nrf52dk/nrf52832
       - nrf54l15dk/nrf54l15/cpuapp
+      - kw45b41z_evk
     tags: bluetooth
     integration_platforms:
       - qemu_cortex_m3

soc/nxp/kinetis/kw45/CMakeLists.txt

@@ -0,0 +1,22 @@
+# Copyright 2025 NXP
+#
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_sources(../../mcx/mcxw/soc.c ../../mcx/mcxw/mcxw71_platform_init.S)
+
+zephyr_include_directories(../../mcx/mcxw/)
+
+zephyr_sources_ifdef(CONFIG_NXP_NBU
+  ../../common/nxp_nbu.c
+  )
+
+zephyr_include_directories(.)
+
+zephyr_sources_ifdef(
+  CONFIG_PM
+  power.c
+)
+
+set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/../../mcx/mcxw/linker.ld CACHE INTERNAL "")
+
+zephyr_linker_sources_ifdef(CONFIG_BT RAM_SECTIONS ../../mcx/mcxw/sections.ld)

soc/nxp/kinetis/kw45/Kconfig

@@ -0,0 +1,23 @@
+# KW45 Series
+
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_SERIES_KINETIS_KW45
+	select ARM
+	select CPU_CORTEX_M33
+	select CPU_CORTEX_M_HAS_DWT
+	select HAS_MCUX
+	select CLOCK_CONTROL
+	select SOC_RESET_HOOK
+	select SOC_EARLY_INIT_HOOK
+
+config SOC_KW45B41Z83
+	select ARM_TRUSTZONE_M
+	select CPU_CORTEX_M_HAS_SYSTICK
+	select CPU_HAS_FPU
+	select CPU_HAS_ARM_SAU
+	select CPU_HAS_ARM_MPU
+	select ARMV8_M_DSP
+
+	rsource "../../common/Kconfig.nbu"

soc/nxp/kinetis/kw45/Kconfig.defconfig

@@ -0,0 +1,53 @@
+# KW45 series configuration options
+
+# Copyright 2025 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+if SOC_SERIES_KINETIS_KW45
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default 96000000 if CORTEX_M_SYSTICK
+
+config MCUX_FLASH_K4_API
+	default y
+
+config WDOG_INIT
+	default n
+
+config SOC_SERIES
+	default "kw45"
+
+config NUM_IRQS
+	default 74
+
+if BT
+
+# Include intercore messaging component
+config NXP_RF_IMU
+	default y
+
+#  Set the controller's public identity using NXP vendor command
+config BT_HCI_SET_PUBLIC_ADDR
+	default y
+
+# HCI RX buffers are received in ISR context. RX messages
+# need to be queued and processed by a dedicated thread
+config HCI_NXP_RX_THREAD
+	default y
+
+endif # BT
+
+config PM
+	select COUNTER
+
+config FLASH
+	default y if BT
+
+config BT_BUF_EVT_DISCARDABLE_SIZE
+	default 84 if BT
+
+choice LIBC_IMPLEMENTATION
+	default NEWLIB_LIBC if PM
+endchoice
+
+endif # SOC_SERIES_KINETIS_KW45