8332533: RISC-V: Enable Matcher::supports_vector_variable_shifts with…

… UseRVV
zifeihan · May 20, 2024 · 546c255 · 546c255
1 parent d6b7f9b
commit 546c255
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/hotspot/cpu/riscv/matcher_riscv.hpp b/src/hotspot/cpu/riscv/matcher_riscv.hpp
@@ -129,7 +129,7 @@
 
   // Does the CPU supports vector variable shift instructions?
   static constexpr bool supports_vector_variable_shifts(void) {
-    return false;
+    return UseRVV;
   }
 
   // Does target support predicated operation emulation.