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Update llvm-public #18

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e81819e
G_CONCAT_VECTOR legalization & selection for generic IR (JIRA AIECC-…
ValentijnvdBeek Apr 24, 2024
f334a82
Add support to G_UNMERGE for unpacking into scalar elements and split…
ValentijnvdBeek Apr 24, 2024
e22d945
[AIE2] Fix control reg IR dependencies for VPACK and VST.PACK.
SagarMaheshwari99 Apr 15, 2024
13b59b9
[TableGen] Support modelInaccessibleMemThroughRegs property for Table…
SagarMaheshwari99 Apr 26, 2024
c4bf2f8
[AIE2] Model ctrl reg IR dependencies for VSRS, VUPS, VST.SRS and VLD…
SagarMaheshwari99 Apr 26, 2024
e206259
[AIE2] Model ctrl reg IR dependencies for VCONV.bf16.fp32 and VST.CON…
SagarMaheshwari99 Apr 16, 2024
ffff9eb
[AIE2] Model ctrl reg IR dependencies for VFLOOR.
SagarMaheshwari99 Apr 15, 2024
e2cccaf
[AIE2] Model ctrl reg IR dependencies for VADD.f, VSUB.f, VNEGADD/SUB.f.
SagarMaheshwari99 Apr 16, 2024
87bf9d5
[AIE2] Model ctrl reg IR dependencies for VCLR, VNEG.f, VMUL.f and VN…
SagarMaheshwari99 Apr 17, 2024
6b61d72
[AIE2] Model ctrl reg IR dependencies for VMAC.f, VMSC.f, VADDMAC.f &…
SagarMaheshwari99 Apr 17, 2024
e4ab1bd
[AIE2] Model ctrl reg IR dependencies for VMUL.f, VNEGMUL.f, VMAC.f, …
SagarMaheshwari99 Apr 17, 2024
83090a1
Update DeadMachineInstructionElim
abhinay-anubola Apr 22, 2024
2db7b15
Update AIEPostSelectOptimize by splitting into two passes
abhinay-anubola Apr 22, 2024
5488ceb
[AIE2] G_BUILD_VECTOR legalization from generic IR for native vectors
ValentijnvdBeek Apr 4, 2024
38a1447
[AIE2] Implement selection for the new G_AIE_VECTOR_ELT_LEFT
ValentijnvdBeek Apr 3, 2024
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Update AIEPostSelectOptimize by splitting into two passes
abhinay-anubola authored and konstantinschwarz committed Apr 30, 2024
commit 2db7b159e0bebf2c392791ca18471d7ec73166a7
4 changes: 4 additions & 0 deletions llvm/lib/Target/AIE/AIE2TargetMachine.cpp
Original file line number Diff line number Diff line change
@@ -156,7 +156,11 @@ void AIE2PassConfig::addPreRegBankSelect() {
bool AIE2PassConfig::addGlobalInstructionSelect() {
addPass(new InstructionSelect(getOptLevel()));
if (getOptLevel() != CodeGenOptLevel::None) {
addPass(
createDeadMachineInstructionElim(/*KeepLifetimeInstructions=*/true));
addPass(createAIEPostSelectOptimize());
addPass(
createDeadMachineInstructionElim(/*KeepLifetimeInstructions=*/true));
}
return false;
}
60 changes: 1 addition & 59 deletions llvm/lib/Target/AIE/AIEPostSelectOptimize.cpp
Original file line number Diff line number Diff line change
@@ -28,21 +28,6 @@
// $crsat = COPY %0 | | | ---------------------------
// %4 = opcode implicit $crsat | | | %4 = opcode implicit $crsat
//
// 2. Deadcode elimination.
// See Test 5: "crupssign_redundant_reassignments" func in
// CodeGen/AIE/aie2/GlobalISel/post-select-optimize-erase-physregs.mir
// E.g. Transform -
// %0 = COPY $r0 | | | %0 = COPY $r0
// %1 = COPY $r1 | | | %1 = COPY $r1
// $crupssign = COPY %0 | | | $crupssign = COPY %0
// %2 = opcode implicit $crupssign | | | %2 = opcode implicit $crupssign
// $crupssign = MOV 0 |-> to ->| -------------------------------
// $crupssign = COPY %0 | | | -------------------------------
// %3 = opcode implicit $crupssign | | | %3 = opcode implicit $crupssign
// $crupssign = MOV 0 | | | -------------------------------
// $crupssign = COPY %1 | | | $crupssign = COPY %1
//
//===----------------------------------------------------------------------===//

#include "AIE.h"
#include "llvm/ADT/DenseMap.h"
@@ -85,15 +70,13 @@ class AIEPostSelectOptimize : public MachineFunctionPass {
* @brief To track the PhysReg defs and the state of their use.
*/
struct PhysRegDefInfoStruct {
// Tracks the last absolutely required def.
MachineInstr *LastRequiredDef = nullptr;
// Tracks the last visited def. Change with every new def.
MachineInstr *LastVisitedDef = nullptr;
// Tracks if the PhysReg is used in between current def and LastVisitedDef.
bool IsUsed = false;

PhysRegDefInfoStruct(MachineInstr *MI)
: LastRequiredDef(MI), LastVisitedDef(MI), IsUsed(false) {}
: LastVisitedDef(MI), IsUsed(false) {}
};

/// Collect all VirtReg to PhysReg copies that can be removed at the last.
@@ -259,47 +242,6 @@ bool AIEPostSelectOptimize::eraseOrStoreRedundantPhysRegDefs(

bool Changed = false;
MachineInstr *CurrentDef = &MI;
if (!DefInfo.IsUsed) {
/*CASE 3*/
// If MI in the map is not similar to current MI, but there is
// redundancy and no instruction reads that physical register between
// definitions, erase the MI in the map, since we only need the current MI.
// E.g.: a fancy case of dead code elimination.
// %0 = COPY $r0
// $crupssign = COPY %0 <---------------- LastRequiredDef
// %1 = opcode implicit $crupssign
// $crupssign = MOV 0 <------------------ LastVisitedDef : dead
// $crupssign = COPY %0 <----------------- Current Def
// %2 = opcode implicit $crupssign
LLVM_DEBUG(dbgs() << "Erasing redundant MI - " << *DefInfo.LastVisitedDef);
DefInfo.LastVisitedDef->eraseFromParent();
Changed = true;

/*CASE 4*/
// We first removed the deadcode in between and then check if there are
// other identical copies.
// Continuing the above example -
// %0 = COPY $r0
// $crupssign = COPY %0 <----------------- LastRequiredDef
// %1 = opcode implicit $crupssign
// $crupssign = COPY %0 <----------------- Current Def : also redundant
// %2 = opcode implicit $crupssign
if (DefInfo.LastRequiredDef->isIdenticalTo(MI)) {
LLVM_DEBUG(dbgs() << "Erasing redundant MI - " << MI);
MI.eraseFromParent();

// Assign the LastRequiredDef as the CurrentDef, which is eventually
// assigned to LastVisitedDef since both the LastVisitedDef and the
// current MI have been erased.
// This basically serves as another "anchor" to which we can compare
// are copies with.
CurrentDef = DefInfo.LastRequiredDef;
}
} else {
// Assign LastVisitedDef to LastRequiredDef since there is a use in between
// and we cannot remove it.
DefInfo.LastRequiredDef = DefInfo.LastVisitedDef;
}
// Change the LastVisitedDef to CurrentDef to increment our "anchor".
DefInfo.LastVisitedDef = CurrentDef;
DefInfo.IsUsed = false;

Large diffs are not rendered by default.

2 changes: 2 additions & 0 deletions llvm/test/CodeGen/AIE/aie2/llc-pipeline-aie2.ll
Original file line number Diff line number Diff line change
@@ -128,7 +128,9 @@
; AIE-O123-NEXT: Lazy Block Frequency Analysis

; AIE-O0123-NEXT: InstructionSelect
; AIE-O123-NEXT: Remove dead machine instructions
; AIE-O123-NEXT: AIE Post Select Optimizer
; AIE-O123-NEXT: Remove dead machine instructions
; AIE-O0123-NEXT: ResetMachineFunction
; AIE-O0123-NEXT: Finalize ISel and expand pseudo-instructions