Milestone Meeting Two

Upstream Attempt One

The first two patch series's were sent to the mailing list.

target_arm: Make the reset rom_ptr a propert

https://lists.nongnu.org/archive/html/qemu-devel/2014-08/msg03548.html This is a method to change were the CPU resets to, so that the CPU could be set to reset to an address other then zero as the Netduino doesn't actually have any memory at 0 (it just maps memory there).

Netduino Plus 2 Machine Model

https://lists.nongnu.org/archive/html/qemu-devel/2014-08/msg04026.html This is the first attempt to upstream the Netduino Plus 2 Machine Model.

Comments received so far:

• Peter C.
  • General code cleanups to match QEMU's style
  • A few logical errors were also discovered and corrected
• Peter Maydell
  • Large changes based on using (or re-writing) the armv7m_init() function to support this board
  • He also doesn't like using the M3 instead of the M4 <- Will have to have a look at the Netduino 2
  • There are a lot of changes that need to be made to the GPIO device. Including using GPIO out lines
    • Still confused with what they do

Closed Issues

A list of closed issues for this meeting can be seen here: https://github.com/alistair23/qemu/issues?q=is%3Aissue+is%3Aclosed+milestone%3A%22Milestone+Meeting+Two%22

This includes:

• No longer requiring a hack to set the CPU reset address
• The Makefiles now follow a similar style to other QEMU machines
• QEMU now supports the Netduino Timer 2 to 5
• Examples 1, 2, 3, 5 and 9 can now be run in QEMU

Code Checkins

There have been a number of checkins since the last meeting, they can be seen in the .dev branch. Some of the key ones are:

• Netduino_TIM2_5: General updates based on datasheet -> https://github.com/alistair23/qemu/commit/7882dadcd1cd4af965ecfac1ae7840e60314cd52
• Netduino_GPIO: Change the reset values based on the GPIO letter -> https://github.com/alistair23/qemu/commit/95c8e411e71a5cede724d5ca218bc5e9250418b0
• Netduino: Correctly attach devices -> https://github.com/alistair23/qemu/commit/5db1c1c4188c14c71b37fe32f380b911174deee1
• Netduino_GPIO: Update to match teh datasheet -> https://github.com/alistair23/qemu/commit/ef1fa30d9348ee9de65a39e423a380b7383d5f58
• Netduino_USART: Prepare for upstreaming -> https://github.com/alistair23/qemu/commit/73f5c0d5f65f62e71fcac7e176c230ef9df7ae5e

Netduino Plus

I had a look at a few of the Netduino Plus peripherals and they look very similar to the Netduino Plus 2. The GPIO was exactly the same as far as I could tell. Even SYSCFG looks the same. This might be the method to take. The only two differences I have seen are:

• The Netduino Plus has a Cortex-M3 instead of a M4 with a slower clock speeed
• The Plus 2 has Ehternet

Misc Notes

So GPIO doesn't appear to actually have interrupts, it's the EXTI (External Interrupts). This is configured by the SYSCFG/EXTI devices and triggered straight from the EXTI controller (page 384). This is why it has been such a trouble/confusing. Should be pretty straight forward to add a EXTI device, although probably after the upstream attempt. Need to remove IRQ's from GPIO devices though

So the GPIO interrupt hack I had, appeared to just be triggering the EXT9_5 line which is why it worked. This shouldn't actually be in the GPIO though