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ARC Feedback Updates in Message protocol, Transport, Base, CPPC #84

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merged 10 commits into from
Jan 2, 2025

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pathakraul
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@pathakraul
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pathakraul commented Dec 25, 2024

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Couple of recent comments are still pending from ARC to be taken care of. Which I am working on and will raise separate PR for that

@@ -62,6 +62,15 @@ The following table lists the services in the BASE service group:
| 0x08
| BASE_SET_MSI
| NORMAL_REQUEST

| 0x09
| BASE_GET_MSI
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@avpatel avpatel Dec 26, 2024

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Missing BASE_SET_MSI

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on line 62-64

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the subject and description of commit is misleading as it does not give full information, I will update it before merging in the end



[#srvgrp_base_config_msi]
==== Service: BASE_CONFIG_MSI (SERVICE_ID: 0x0A)
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s/BASE_CONFIG_MSI/BASE_SET_MSI_TARGET/

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Sure

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Should we then rename BASE_SET_MSI to BASE_SET_MSI_STATE?. Otherwise with above rename it gets confusing IMO

if `\((tail + 1) % (M - 2)) == head`.

NOTE: The queues and queue state are shared between application processors, and
due to mechanisms such as kexec and others that can spawn another OS from the
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Use "OS / Firmware" instead of just "OS" because in the future some M-mode firmware may also implement kexec() style feature.

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Sure

@@ -275,7 +275,10 @@ enqueue the message.
In an implementation, a queue is empty if the `head` == `tail` and a queue is full
if `\((tail + 1) % (M - 2)) == head`.

NOTE:
NOTE: The queues and queue state are shared between application processors, and
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state -> states

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sure

0b100 - 0b111: Reserved for future use.

----
FLAGS[3]: Doorbell interrupt request.
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Some field names use full capital letters but some are not.

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@pathakraul pathakraul Dec 26, 2024

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From the start we gave names to some of the fields which were capitalized, some we didn't. I think lets make all non capitalized.

selectively disable it so that the platform microcontroller in that case does
not trigger a doorbell.
If the doorbell interrupts are supported and enabled, the sender of the RPMI
normal request message can set the `flags[3]: Doorbell interrupt request` bit to
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should use FLAGS[3] , so that same with the field name above.
Apply the same for the rest of description below.

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Agree


| 8
| DB_SETMASK_LOW
| uint32
| Lower 32-bit of doorbell set mask.
| Lower 32-bit of doorbell set mask for Performance Request fast-channel. +
Only the lower bits of this field equal to the doorbell register width must be used
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this sentence a bit confusing.
Do you mean "Only the bits within this field corresponding to the doorbell register width should be used as the bitmask."?

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The register width can be lower than the width of this field and in that case the bitmask is always equal to the register width from the LSB side.

I will try to format this line here and other place

If the MSI support is available, the application processor can enable the
MSI using this service. If the MSI is not supported, the appropriate error code
is returned. After the MSI is enabled, the configurations such as MSI address and
MSI data can be configured using another service `BASE_CONFIG_MSI`. The platform
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Should call BASE_CONFIG_MSI , then only SET_MSI enable/disable?

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I dont understand your question


The application processor can also use this service to disable the MSI. Once
disabled, if the application processor enables the MSI again then it must call
`BASE_CONFIG_MSI` again to configure the MSI address and MSI data.
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disable MSI will void the MSI address and data?

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@lftan lftan Dec 26, 2024

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if that's the case, then can include set MSI address and data parameters to SET_MSI service.
Then don't need to have CONFIG_MSI service.

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@pathakraul pathakraul Dec 26, 2024

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That another possible way agree, but there had been discussion on the ARC feedback issue to have separate enable/disable service along with configuration service.
With this approach the MSI configuration does not have a case of getting passed as invalid values

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disable MSI will void the MSI address and data?

What happens with the MSI configuration is not necessary, Spec mandates that Configuration must be done again. What PuC does to address and data is not necessary

| 1
| STATE
| uint32
| MSI state
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Having second thoughts to convert this into a bitfield. This will enable multiple combination of states to be returned. Otherwise currently we need to define a unique integer value for every combination of state. For example "Enable only" and "Enable and Configured".

I will go ahead and do that. Please comment it there are objections

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@pathakraul pathakraul Dec 29, 2024

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Something like below -

STATE[31:2] :  Reserved
STATE[1]:   1: if MSI Target Configured/Valid, 0 otherwise
STATE[0]:   1: if MSI Enabled, 0 MSI Disabled

Add new section meant for software implementaiton of
shared memory queues which will cover the queue discovery
and also the ARC feedback to to define the queue initialization
details, queue enpty and full condition for implemenations as
normative text

Signed-off-by: Rahul Pathak <[email protected]>
…ke mechanisms

ARC feedback was to highlight the possibility that
some message may be delivered to the OS which are
not intended for that OS can be ignored

Signed-off-by: Rahul Pathak <[email protected]>
…quest

Feedback from ARC suggested to change the name of
flags[3] bit to Doorbell interrupt requested. Also,
elaborate when the flags[3] bit is applicable and
other behaviours

Signed-off-by: Rahul Pathak <[email protected]>
As per ARC feedback the TOKEN described as sequence number
is not right and its simply a integer number given to a
RPMI message.
Also describe in non-normative text that how TOKEN is
used for different RPMI message types

Signed-off-by: Rahul Pathak <[email protected]>
CPPC service group already supports the service
to get the offsets of the fastchannels for each
application processor and the requirement for groupping
the fastchannels together is not necessary

Signed-off-by: Rahul Pathak <[email protected]>
As per ARC feedback, explain about the fastchannel doorbell
fields.

Signed-off-by: Rahul Pathak <[email protected]>
@pathakraul pathakraul force-pushed the rpathak_arc_review_79_v2 branch from 7303c48 to a5af049 Compare December 30, 2024 12:26
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@avpatel @lftan I have addressed your comments. Please check.

@@ -77,6 +77,9 @@ If the P2A doorbell is a MSI then the application processors must configure
the MSI on the platform microcontroller side using the RPMI service defined by
the `BASE` service group.

The doorbell register must support write operation or a read-modify-write sequence
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This is required for the A2P doorbell not P2A doorbell.

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I have updated the text for A2P now

@pathakraul pathakraul force-pushed the rpathak_arc_review_79_v2 branch 2 times, most recently from 565c8f8 to 5738b7b Compare December 30, 2024 16:22

If the MSI support is available, the application processor can enable the
MSI using this service. If the MSI is not supported, the appropriate error code
is returned. After the MSI is enabled, the configurations such as MSI target
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First time, the MSI target address is configured before enabling the MSI so this statement looks confusing.

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I can add the text something like - The application processor can enable and configure the MSI in any order but both must be done to allow platform microcontroller to trigger the MSI doorbell

What do you think?

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I have relaxed the requirement where enable and configure can be done in any order but both must be done.

@pathakraul pathakraul force-pushed the rpathak_arc_review_79_v2 branch from 29ebe74 to 0b92002 Compare December 31, 2024 04:59
is done by another defined service `BASE_SET_MSI_TARGET`.

The application processor can also use this service to disable the MSI. Once
disabled, if the application processor enables the MSI again then it must call
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Application process can set MSI target any number of times it want. There is no correlation with MSI enabling/disabling.

Just drop this second sentence "Once disabled, ..."

platform microcontroller can use as a doorbell to the application processor. The
application processor may first discover the MSI support via the
`BASE_GET_ATTRIBUTES` service. The application processor can enable the MSI
using `BASE_SET_MSI_STATE` and configure the target in any order but it must
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As mentioned above, there is STATE required for MSI Target configuration.

! [31:2]
! _Reserved_ and must be `0`.

! [1]
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Ok, if we dont need to maintain any invalid MSI target configuration anytime then current is not needed. I will update

@pathakraul pathakraul force-pushed the rpathak_arc_review_79_v2 branch from 0b92002 to e5db4fe Compare January 2, 2025 10:59
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@avpatel Update the text as per the comments.

[#srvgrp_base_get_msi_state]
==== Service: BASE_GET_MSI_STATE (SERVICE_ID: 0x09)
This service is used to get the state of the MSI, whether the MSI is
enabled/disabled or if the MSI is currently pending as the platform microcontroller
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s/is currently pending as the platform/is currently pending and the platform/

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avpatel commented Jan 2, 2025

only one minor comment in src/srvgrp-base.adoc
otherwise it looks good to me.

As per ARC feedback the BASE service group must also
have provision to disable the MSI. To support that
and also for clarity, add separate services to set
the MSI state which enable/disables the MSI,
service to get the current MSI state and a service
to configure the MSI target.

Signed-off-by: Rahul Pathak <[email protected]>
@pathakraul pathakraul force-pushed the rpathak_arc_review_79_v2 branch from e5db4fe to ddcfae7 Compare January 2, 2025 15:08
@pathakraul pathakraul merged commit 0dca1ec into riscv-non-isa:main Jan 2, 2025
1 check passed
@pathakraul pathakraul deleted the rpathak_arc_review_79_v2 branch January 2, 2025 15:11
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3 participants