Middle of work 7 tested

robehn · Jan 14, 2025 · 496dbf4 · 496dbf4
1 parent 1ba5311
commit 496dbf4
Showing 1 changed file with 6 additions and 6 deletions.
diff --git a/src/hotspot/cpu/riscv/assembler_riscv.hpp b/src/hotspot/cpu/riscv/assembler_riscv.hpp
@@ -1169,27 +1169,27 @@ enum operand_size { int8, int16, int32, uint32, int64 };
   }
 
   void fclass_s(Register Rd, FloatRegister Rs1) {
-    fp_base(Rd, Rs1, 0b00000, 0b001, 0b00, 0b11110);
+    fp_base(Rd, Rs1, 0b00000, 0b001, 0b00, 0b11100);
   }
 
   void fclass_d(Register Rd, FloatRegister Rs1) {
-    fp_base(Rd, Rs1, 0b00000, 0b001, 0b01, 0b11110);
+    fp_base(Rd, Rs1, 0b00000, 0b001, 0b01, 0b11100);
   }
 
   void fmv_x_w(Register Rd, FloatRegister Rs1) {
-    fp_base(Rd, Rs1, 0b00000, 0b000, 0b00, 0b11110);
+    fp_base(Rd, Rs1, 0b00000, 0b000, 0b00, 0b11100);
   }
 
   void fmv_x_d(Register Rd, FloatRegister Rs1) {
-    fp_base(Rd, Rs1, 0b00000, 0b000, 0b01, 0b11110);
+    fp_base(Rd, Rs1, 0b00000, 0b000, 0b01, 0b11100);
   }
 
   void fclass_h(Register Rd, FloatRegister Rs1) {
-    fp_base(Rd, Rs1, 0b00000, 0b001, 0b10, 0b11110);
+    fp_base(Rd, Rs1, 0b00000, 0b001, 0b10, 0b11100);
   }
 
   void fmv_x_h(Register Rd, FloatRegister Rs1) {
-    fp_base(Rd, Rs1, 0b00000, 0b000, 0b10, 0b11110);
+    fp_base(Rd, Rs1, 0b00000, 0b000, 0b10, 0b11100);
   }
 
  private: