Skip to content

Commit

Permalink
temp
Browse files Browse the repository at this point in the history
  • Loading branch information
robehn committed Mar 8, 2024
1 parent dd27df4 commit b580505
Show file tree
Hide file tree
Showing 5 changed files with 7 additions and 3 deletions.
Binary file not shown.
Binary file not shown.
Original file line number Diff line number Diff line change
Expand Up @@ -300,7 +300,7 @@ void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm,
assert(!is_narrow, "phantom access cannot be narrow");
target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_weak);
}
__ call(target);
__ call_mig(target);
__ mv(t0, x10);
__ pop_call_clobbered_registers();
__ mv(x10, t0);
Expand Down Expand Up @@ -703,7 +703,7 @@ void ShenandoahBarrierSetAssembler::generate_c1_load_reference_barrier_runtime_s
assert(is_native, "phantom must only be called off-heap");
target = CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_phantom);
}
__ call(target);
__ call_mig(target);
__ mv(t0, x10);
__ pop_call_clobbered_registers();
__ mv(x10, t0);
Expand Down
4 changes: 4 additions & 0 deletions src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -613,6 +613,10 @@ class MacroAssembler: public Assembler {
la(temp, dest, offset);
jalr(x1, temp, offset);
}

void call_mig(const address dest, Register temp = t0) {
call(dest, temp);
}

inline void ret() {
jalr(x0, x1, 0);
Expand Down
2 changes: 1 addition & 1 deletion src/hotspot/cpu/riscv/stubGenerator_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5432,7 +5432,7 @@ static const int64_t right_3_bits = right_n_bits(3);
}
__ mv(c_rarg0, xthread);
BLOCK_COMMENT("call runtime_entry");
__ call(runtime_entry);
__ call_mig(runtime_entry);

// Generate oop map
OopMap* map = new OopMap(framesize, 0);
Expand Down

0 comments on commit b580505

Please sign in to comment.