temp

robehn · Mar 8, 2024 · dd27df4 · dd27df4
1 parent d6e69c2
commit dd27df4
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Showing 2 changed files with 7 additions and 24 deletions.
diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
@@ -721,38 +721,26 @@ void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0, Reg
 
 void MacroAssembler::la(Register Rd, const address addr) {
   int32_t offset;
-  if (la_relative(Rd, addr, offset)) {
-    addi(Rd, Rd, ((int64_t)offset << 52) >> 52);
-  } else {
-    movptr(Rd, addr);
-  }
+  la(Rd, addr, offset);
+  addi(Rd, Rd, offset);
 }
 
 void MacroAssembler::la(Register Rd, const address addr, int32_t &offset) {
-  assert((uintptr_t)addr < (1ull << 48), "bad address");
-  if (!la_relative(Rd, addr, offset)) {
-    movptr(Rd, addr, offset);
-  }
-}
-
-bool MacroAssembler::la_relative(Register Rd, const address addr, int32_t &offset) {
-  assert((uintptr_t)addr < (1ull << 48), "bad address");
   int64_t distance = addr - pc();
-
   if (is_simm32(distance)) {
     auipc(Rd, (int32_t)distance + 0x800);
     offset = ((int32_t)distance << 20) >> 20;
-    return true;
+  } else {
+    movptr(Rd, addr, offset);
   }
-  return false;
 }
 
 void MacroAssembler::la(Register Rd, const Address &adr) {
   switch (adr.getMode()) {
     case Address::literal: {
       relocInfo::relocType rtype = adr.rspec().reloc()->type();
       if (rtype == relocInfo::none) {
-        mv(Rd, (intptr_t)(adr.target())); // TODO
+        mv(Rd, (intptr_t)(adr.target()));
       } else {
         relocate(adr.rspec(), [&] {
           movptr(Rd, adr.target());
@@ -900,8 +888,7 @@ void MacroAssembler::j(const address dest, Register temp) {
   } else {
     assert(temp != noreg && temp != x0, "expecting a register");
     int32_t offset = 0;
-    bool mustbe = la_relative(temp, dest, offset);
-    assert(mustbe, "Must be");
+    la(temp, dest, offset);
     Assembler::jalr(x0, temp, offset);
   }
 }

diff --git a/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp b/src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
@@ -610,9 +610,7 @@ class MacroAssembler: public Assembler {
     assert_cond(dest != nullptr);
     assert(temp != noreg, "expecting a register");
     int32_t offset = 0;
-    // la(temp, dest, offset);
-    bool mustbe = la_relative(temp, dest, offset);
-    assert(mustbe, "Must be");
+    la(temp, dest, offset);
     jalr(x1, temp, offset);
   }
 
@@ -760,8 +758,6 @@ class MacroAssembler: public Assembler {
   void la(Register Rd, const address addr, int32_t &offset);
   void la(Register Rd, const Address &adr);
 
-  bool la_relative(Register Rd, const address addr, int32_t &offset);
-
   void li16u(Register Rd, uint16_t imm);
   void li32(Register Rd, int32_t imm);
   void li64(Register Rd, int64_t imm);