[LLVM][XTHeadVector] Implement 16.1 vmand{n}/vmnand/vmxor/vmor{n}/vmnor/vmxnor
#95
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As title. Note:
Redefine
AllMasks
from RISCVInstrInfoVPseudos.td to remove fractionally-grouped register groups. So we will not have mask register operations that acceptvbool_<16/32/64>_t
. But riscv-v-intrinsic-0.7.1.pdf declares them. This is left to be addressed in future PRs (when it comes to clang part).